[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"skill-nvidia-nvshmem-enable-tma":3,"mdc-z1ymy4-key":36,"related-org-nvidia-nvshmem-enable-tma":653,"related-repo-nvidia-nvshmem-enable-tma":813},{"slug":4,"name":4,"fn":5,"description":6,"org":7,"tags":11,"stars":20,"repoUrl":21,"updatedAt":22,"license":23,"forks":24,"topics":25,"repo":31,"sourceUrl":34,"mdContent":35},"nvshmem-enable-tma","optimize NVSHMEM CUDA kernels for TMA","Prepare or review NVSHMEM CUDA kernels for TMA SMEM registration and direct-SMEM transfers. Do not use for unrelated CUDA tuning.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},"nvidia","NVIDIA","https:\u002F\u002Fpexgzepcugksgbtrxkhf.supabase.co\u002Fstorage\u002Fv1\u002Fobject\u002Fpublic\u002Forg-logos\u002Fnvidia.png",[12,16,17],{"name":13,"slug":14,"type":15},"Performance","performance","tag",{"name":9,"slug":8,"type":15},{"name":18,"slug":19,"type":15},"Engineering","engineering",579,"https:\u002F\u002Fgithub.com\u002FNVIDIA\u002Fnvshmem","2026-08-31T09:18:50.449676","Apache-2.0",104,[26,27,28,29,8,30],"communciations","cpp","cuda","deep-learning","python",{"repoUrl":21,"stars":20,"forks":24,"topics":32,"description":33},[26,27,28,29,8,30],"NVIDIA NVSHMEM is a parallel programming interface for NVIDIA GPUs based on OpenSHMEM. NVSHMEM can significantly reduce multi-process communication and coordination overheads by allowing programmers to perform one-sided communication from within CUDA kernels and on CUDA streams.","https:\u002F\u002Fgithub.com\u002FNVIDIA\u002Fnvshmem\u002Ftree\u002FHEAD\u002Fskills\u002Fnvshmem-enable-tma","---\nname: nvshmem-enable-tma\ndescription: Prepare or review NVSHMEM CUDA kernels for TMA SMEM registration and direct-SMEM transfers. Do not use for unrelated CUDA tuning.\nlicense: Apache-2.0\nmetadata:\n  version: \"1.0.0\"\n  author: NVIDIA NVSHMEM Team \u003Cnvshmem@nvidia.com>\n  tags:\n    - nvshmem\n    - tma\n---\n\n# Enable TMA in NVSHMEM Applications\n\n## Purpose\n\nPrepare an application for NVSHMEM's TMA-backed device-side transfers without changing its put\u002Fget APIs or unrelated kernels. Assess the target, choose the correct shared-memory path, make the smallest safe change, and explain launch-time requirements.\n\nPrefer the exact target-version [NVSHMEM TMA documentation](https:\u002F\u002Farchive.docs.nvidia.com\u002Fnvshmem\u002Fapi\u002F3.7.0\u002Ftma.html) when it differs from these references.\n\n## Prerequisites\n\n- Require readable CUDA\u002FC++ source for a patch or code review. A static assessment needs no GPU, installed NVSHMEM runtime, or cluster access.\n- Require an NVSHMEM 3.7.0-or-newer development environment and CUDA toolchain only when compiling.\n- Require SM90-or-newer GPUs and peer GPU load\u002Fstore reachability such as NVLink only when validating TMA execution or performance.\n- CFT requires TMA.\n\n## Reference Routing\n\nBefore changing code, read [registration-and-launch.md](references\u002Fregistration-and-launch.md) completely and then every reference selected below. Use the references as shapes, not blind replacements: preserve the application's error handling, launch abstraction, completion contract, and shared-memory layout.\n\n| Situation | Required additional reference |\n| --- | --- |\n| Global-memory operands, or staging copy\u002Fbuffer is not proven redundant | [gmem-staging.md](references\u002Fgmem-staging.md) |\n| Explicitly opted-in shared-memory put source with a proven-redundant GMEM copy | [direct-smem-put.md](references\u002Fdirect-smem-put.md) |\n| Compile, run, diagnose, or report validation | [validation-and-troubleshooting.md](references\u002Fvalidation-and-troubleshooting.md) |\n\nFor a read-only assessment or review, read only the references needed to evaluate the proposed path. Do not make a code change until the complete registration reference and every selected path reference have been read.\n\n## Inputs\n\n- **Required:** Application source or source path, and the requested outcome: assessment, patch, review, or debugging.\n- **Optional:** Derive NVSHMEM version, CUDA architecture, topology, kernel launch sites, and launch configuration from the project or environment when possible.\n- **Conditional for execution:** Obtain build command, launch command, and target hardware access only when the user asks to compile or run validation.\n- Ask only for facts that cannot be inspected and materially affect the result. Do not require topology details merely to prepare code; mark performance benefit unverified when topology is unknown.\n\n## Scope\n\n- Identify exactly one user-opted-in CUDA translation unit and one NVSHMEM communication kernel before editing. Its required launch code is the complete change boundary.\n- Derive the target from the user's named file\u002Fkernel or attachment metadata, not from files discovered by globbing. A singular request does not authorize editing every eligible kernel.\n- Preserve all other kernels, host-only NVSHMEM use, and unrelated launch code. Never modify adjacent candidates merely because they contain NVSHMEM calls.\n- Expand beyond one kernel only when the user explicitly names multiple targets. Apply this scope check to each target independently.\n\nBefore editing, answer every question below. Stop without editing if a required answer is no or unverified.\n\n- **Explicit scope:** Is this the selected file and kernel?\n- **Eligible operation:** Does the selected kernel's device call graph reach a TMA-relevant NVSHMEM operation?\n- **Necessary edit:** Is every planned change needed for registration, lifetime, direct-SMEM dataflow, or launch sizing?\n- **Proven redundancy:** If removing a staging copy or buffer, is it proven to have no producer, consumer, alias, synchronization, completion, or lifetime role? If the answer is unverified because the GMEM buffer is a parameter, escapes the selected translation unit, or has uninspectable consumers, ask the user whether it is externally observable before editing. Do not infer redundancy.\n- **No speculation:** Does the selected target require application-side TMA registration for the operation being prepared?\n- **Surgical launch change:** Can the existing grid, block, stream, arguments, and error handling remain intact apart from required registration parameters and dynamic-SMEM bytes?\n\nAfter editing, inspect the changed-file list and diff. Remove only your own out-of-scope edits before reporting completion; the changed application file set must contain only the opted-in target.\n\n## Instructions\n\n### 1. Establish the Boundary\n\n- Treat an assessment or review as read-only.\n- Treat a request to enable, prepare, update, or fix TMA as permission to edit only the selected kernel and in-scope launch configuration.\n- Inspect the selected kernel's device call graph for device-side point-to-point put, get, put-with-signal, and their typed\u002Fthread\u002Fwarp\u002Fblock variants.\n\n### 2. Decide Whether TMA Is Useful and Available\n\nState these conclusions before or alongside a patch:\n\n- Require NVSHMEM 3.7.0 or newer. Stop a requested conversion for an older confirmed version and recommend upgrading.\n- Require SM90 or newer for TMA execution. With `NVSHMEM_TMA_POLICY=ENABLE`, older GPUs preserve correctness through the regular path but receive no TMA benefit.\n- TMA helps only peer-reachable GPU memory paths through the GPU load\u002Fstore fabric, normally NVLink. Do not recommend it for IB, RoCE, EFA, or another network transport.\n- It is promising for large point-to-point transfers, low communication-thread counts, fused kernels, or tiles already in shared memory. Never promise a speedup without measurement.\n\nWhen version, architecture, or topology is unknown, prepare code only if requested and label the corresponding conclusion unverified.\n\n### 3. Classify Each Operation\n\nInspect local operand spaces, application shared memory, staging-copy dataflow, dynamic\u002Fstatic shared memory, alignment, early returns, CTA-uniform control flow, existing fences\u002Fflushes\u002Fquiet calls, and possible concurrent staged callers in a CTA.\n\n| Situation | Path |\n| --- | --- |\n| Global-memory application operands, or no proven-redundant staging | NVSHMEM-managed GMEM staging |\n| Shared-memory put source with a proven-redundant SMEM-to-GMEM copy | Offer direct shared-memory put as an explicit opt-in |\n| Shared-memory get destination | Keep the documented staging path |\n\nDefault to NVSHMEM-managed staging. Never introduce a new application shared-memory layout solely to force a direct-operand path.\n\n### 4. Apply the Selected References\n\nFollow the complete registration\u002Flifetime protocol in the shared registration reference. Then apply the selected path reference. Preserve existing completion semantics and do not hard-code the current recommended shared-memory byte count.\n\n### 5. Validate and Report\n\nRead the validation reference for all compile, run, diagnosis, and validation-report work. Lead the final report with one of:\n\n- `TMA is useful and the application is prepared`\n- `The application is prepared, but TMA benefit is unverified`\n- `TMA is not useful or not supported for this target`\n\nUse this report template:\n\n```text\nOutcome: \u003Cone required outcome line above>\nChanged scope: \u003Cthe selected file, kernel, and launch site; confirm no adjacent files changed>\nSelected path: \u003CNVSHMEM-managed GMEM staging | explicitly opted-in direct-SMEM put>\nPolicy precondition: Set NVSHMEM_TMA_POLICY=ENABLE before nvshmem_init*; \u003Cwhere to set it>\nEligibility: NVSHMEM \u003Cversion, must be >= 3.7.0>; \u003CSM90+ evidence>; \u003CNVLink\u002Fpeer load-store evidence>\nOperation constraints: \u003Calignment, byte count, scope\u002Fconcurrency, completion, shared-memory sizing>\nFallback: ENABLE preserves the regular path for ineligible operations; registration alone does not guarantee TMA routing\nUnverified: \u003Ctopology, occupancy, or none>\nValidation: \u003Cchecks run and exact remaining test commands>\n```\n\nMention any direct-SMEM candidate deliberately not applied because it was outside scope or its redundancy was not proven.\n\n## Limitations\n\n- Do not convert host-side RMA, collectives without an applicable TMA path, network-transport operations, or remote shared-memory targets.\n- Do not claim registration guarantees TMA routing; policy, architecture, topology, operand space, alignment, size, scope, and runtime limits determine each transfer.\n\n## Troubleshooting\n\nFor configuration failures, incorrect results, hangs near shared-memory release, or an unselected TMA path, read [validation-and-troubleshooting.md](references\u002Fvalidation-and-troubleshooting.md). Treat regular-path fallback under `NVSHMEM_TMA_POLICY=ENABLE` as valid behavior; do not diagnose it as a correctness failure.\n\n## Examples\n\n```text\nUse $nvshmem-enable-tma to prepare app.cu for NVSHMEM TMA on H100 NVLink while leaving non-NVSHMEM kernels unchanged.\n\nUse $nvshmem-enable-tma to inspect a shared-tile-to-GMEM-to-put sequence and, if the GMEM copy is provably redundant, pass the existing shared tile directly.\n\nUse $nvshmem-enable-tma to assess an NVSHMEM 3.6 application running on A100 peers connected only through InfiniBand.\n```\n",{"data":37,"body":44},{"name":4,"description":6,"license":23,"metadata":38},{"version":39,"author":40,"tags":41},"1.0.0","NVIDIA NVSHMEM Team \u003Cnvshmem@nvidia.com>",[42,43],"nvshmem","tma",{"type":45,"children":46},"root",[47,56,63,69,85,91,116,122,135,214,219,225,264,270,293,298,361,366,372,379,397,403,408,440,445,451,456,516,521,527,532,538,543,573,578,590,595,601,614,620,638,644],{"type":48,"tag":49,"props":50,"children":52},"element","h1",{"id":51},"enable-tma-in-nvshmem-applications",[53],{"type":54,"value":55},"text","Enable TMA in NVSHMEM Applications",{"type":48,"tag":57,"props":58,"children":60},"h2",{"id":59},"purpose",[61],{"type":54,"value":62},"Purpose",{"type":48,"tag":64,"props":65,"children":66},"p",{},[67],{"type":54,"value":68},"Prepare an application for NVSHMEM's TMA-backed device-side transfers without changing its put\u002Fget APIs or unrelated kernels. Assess the target, choose the correct shared-memory path, make the smallest safe change, and explain launch-time requirements.",{"type":48,"tag":64,"props":70,"children":71},{},[72,74,83],{"type":54,"value":73},"Prefer the exact target-version ",{"type":48,"tag":75,"props":76,"children":80},"a",{"href":77,"rel":78},"https:\u002F\u002Farchive.docs.nvidia.com\u002Fnvshmem\u002Fapi\u002F3.7.0\u002Ftma.html",[79],"nofollow",[81],{"type":54,"value":82},"NVSHMEM TMA documentation",{"type":54,"value":84}," when it differs from these references.",{"type":48,"tag":57,"props":86,"children":88},{"id":87},"prerequisites",[89],{"type":54,"value":90},"Prerequisites",{"type":48,"tag":92,"props":93,"children":94},"ul",{},[95,101,106,111],{"type":48,"tag":96,"props":97,"children":98},"li",{},[99],{"type":54,"value":100},"Require readable CUDA\u002FC++ source for a patch or code review. A static assessment needs no GPU, installed NVSHMEM runtime, or cluster access.",{"type":48,"tag":96,"props":102,"children":103},{},[104],{"type":54,"value":105},"Require an NVSHMEM 3.7.0-or-newer development environment and CUDA toolchain only when compiling.",{"type":48,"tag":96,"props":107,"children":108},{},[109],{"type":54,"value":110},"Require SM90-or-newer GPUs and peer GPU load\u002Fstore reachability such as NVLink only when validating TMA execution or performance.",{"type":48,"tag":96,"props":112,"children":113},{},[114],{"type":54,"value":115},"CFT requires TMA.",{"type":48,"tag":57,"props":117,"children":119},{"id":118},"reference-routing",[120],{"type":54,"value":121},"Reference Routing",{"type":48,"tag":64,"props":123,"children":124},{},[125,127,133],{"type":54,"value":126},"Before changing code, read ",{"type":48,"tag":75,"props":128,"children":130},{"href":129},"references\u002Fregistration-and-launch.md",[131],{"type":54,"value":132},"registration-and-launch.md",{"type":54,"value":134}," completely and then every reference selected below. Use the references as shapes, not blind replacements: preserve the application's error handling, launch abstraction, completion contract, and shared-memory layout.",{"type":48,"tag":136,"props":137,"children":138},"table",{},[139,158],{"type":48,"tag":140,"props":141,"children":142},"thead",{},[143],{"type":48,"tag":144,"props":145,"children":146},"tr",{},[147,153],{"type":48,"tag":148,"props":149,"children":150},"th",{},[151],{"type":54,"value":152},"Situation",{"type":48,"tag":148,"props":154,"children":155},{},[156],{"type":54,"value":157},"Required additional reference",{"type":48,"tag":159,"props":160,"children":161},"tbody",{},[162,180,197],{"type":48,"tag":144,"props":163,"children":164},{},[165,171],{"type":48,"tag":166,"props":167,"children":168},"td",{},[169],{"type":54,"value":170},"Global-memory operands, or staging copy\u002Fbuffer is not proven redundant",{"type":48,"tag":166,"props":172,"children":173},{},[174],{"type":48,"tag":75,"props":175,"children":177},{"href":176},"references\u002Fgmem-staging.md",[178],{"type":54,"value":179},"gmem-staging.md",{"type":48,"tag":144,"props":181,"children":182},{},[183,188],{"type":48,"tag":166,"props":184,"children":185},{},[186],{"type":54,"value":187},"Explicitly opted-in shared-memory put source with a proven-redundant GMEM copy",{"type":48,"tag":166,"props":189,"children":190},{},[191],{"type":48,"tag":75,"props":192,"children":194},{"href":193},"references\u002Fdirect-smem-put.md",[195],{"type":54,"value":196},"direct-smem-put.md",{"type":48,"tag":144,"props":198,"children":199},{},[200,205],{"type":48,"tag":166,"props":201,"children":202},{},[203],{"type":54,"value":204},"Compile, run, diagnose, or report validation",{"type":48,"tag":166,"props":206,"children":207},{},[208],{"type":48,"tag":75,"props":209,"children":211},{"href":210},"references\u002Fvalidation-and-troubleshooting.md",[212],{"type":54,"value":213},"validation-and-troubleshooting.md",{"type":48,"tag":64,"props":215,"children":216},{},[217],{"type":54,"value":218},"For a read-only assessment or review, read only the references needed to evaluate the proposed path. Do not make a code change until the complete registration reference and every selected path reference have been read.",{"type":48,"tag":57,"props":220,"children":222},{"id":221},"inputs",[223],{"type":54,"value":224},"Inputs",{"type":48,"tag":92,"props":226,"children":227},{},[228,239,249,259],{"type":48,"tag":96,"props":229,"children":230},{},[231,237],{"type":48,"tag":232,"props":233,"children":234},"strong",{},[235],{"type":54,"value":236},"Required:",{"type":54,"value":238}," Application source or source path, and the requested outcome: assessment, patch, review, or debugging.",{"type":48,"tag":96,"props":240,"children":241},{},[242,247],{"type":48,"tag":232,"props":243,"children":244},{},[245],{"type":54,"value":246},"Optional:",{"type":54,"value":248}," Derive NVSHMEM version, CUDA architecture, topology, kernel launch sites, and launch configuration from the project or environment when possible.",{"type":48,"tag":96,"props":250,"children":251},{},[252,257],{"type":48,"tag":232,"props":253,"children":254},{},[255],{"type":54,"value":256},"Conditional for execution:",{"type":54,"value":258}," Obtain build command, launch command, and target hardware access only when the user asks to compile or run validation.",{"type":48,"tag":96,"props":260,"children":261},{},[262],{"type":54,"value":263},"Ask only for facts that cannot be inspected and materially affect the result. Do not require topology details merely to prepare code; mark performance benefit unverified when topology is unknown.",{"type":48,"tag":57,"props":265,"children":267},{"id":266},"scope",[268],{"type":54,"value":269},"Scope",{"type":48,"tag":92,"props":271,"children":272},{},[273,278,283,288],{"type":48,"tag":96,"props":274,"children":275},{},[276],{"type":54,"value":277},"Identify exactly one user-opted-in CUDA translation unit and one NVSHMEM communication kernel before editing. Its required launch code is the complete change boundary.",{"type":48,"tag":96,"props":279,"children":280},{},[281],{"type":54,"value":282},"Derive the target from the user's named file\u002Fkernel or attachment metadata, not from files discovered by globbing. A singular request does not authorize editing every eligible kernel.",{"type":48,"tag":96,"props":284,"children":285},{},[286],{"type":54,"value":287},"Preserve all other kernels, host-only NVSHMEM use, and unrelated launch code. Never modify adjacent candidates merely because they contain NVSHMEM calls.",{"type":48,"tag":96,"props":289,"children":290},{},[291],{"type":54,"value":292},"Expand beyond one kernel only when the user explicitly names multiple targets. Apply this scope check to each target independently.",{"type":48,"tag":64,"props":294,"children":295},{},[296],{"type":54,"value":297},"Before editing, answer every question below. Stop without editing if a required answer is no or unverified.",{"type":48,"tag":92,"props":299,"children":300},{},[301,311,321,331,341,351],{"type":48,"tag":96,"props":302,"children":303},{},[304,309],{"type":48,"tag":232,"props":305,"children":306},{},[307],{"type":54,"value":308},"Explicit scope:",{"type":54,"value":310}," Is this the selected file and kernel?",{"type":48,"tag":96,"props":312,"children":313},{},[314,319],{"type":48,"tag":232,"props":315,"children":316},{},[317],{"type":54,"value":318},"Eligible operation:",{"type":54,"value":320}," Does the selected kernel's device call graph reach a TMA-relevant NVSHMEM operation?",{"type":48,"tag":96,"props":322,"children":323},{},[324,329],{"type":48,"tag":232,"props":325,"children":326},{},[327],{"type":54,"value":328},"Necessary edit:",{"type":54,"value":330}," Is every planned change needed for registration, lifetime, direct-SMEM dataflow, or launch sizing?",{"type":48,"tag":96,"props":332,"children":333},{},[334,339],{"type":48,"tag":232,"props":335,"children":336},{},[337],{"type":54,"value":338},"Proven redundancy:",{"type":54,"value":340}," If removing a staging copy or buffer, is it proven to have no producer, consumer, alias, synchronization, completion, or lifetime role? If the answer is unverified because the GMEM buffer is a parameter, escapes the selected translation unit, or has uninspectable consumers, ask the user whether it is externally observable before editing. Do not infer redundancy.",{"type":48,"tag":96,"props":342,"children":343},{},[344,349],{"type":48,"tag":232,"props":345,"children":346},{},[347],{"type":54,"value":348},"No speculation:",{"type":54,"value":350}," Does the selected target require application-side TMA registration for the operation being prepared?",{"type":48,"tag":96,"props":352,"children":353},{},[354,359],{"type":48,"tag":232,"props":355,"children":356},{},[357],{"type":54,"value":358},"Surgical launch change:",{"type":54,"value":360}," Can the existing grid, block, stream, arguments, and error handling remain intact apart from required registration parameters and dynamic-SMEM bytes?",{"type":48,"tag":64,"props":362,"children":363},{},[364],{"type":54,"value":365},"After editing, inspect the changed-file list and diff. Remove only your own out-of-scope edits before reporting completion; the changed application file set must contain only the opted-in target.",{"type":48,"tag":57,"props":367,"children":369},{"id":368},"instructions",[370],{"type":54,"value":371},"Instructions",{"type":48,"tag":373,"props":374,"children":376},"h3",{"id":375},"_1-establish-the-boundary",[377],{"type":54,"value":378},"1. Establish the Boundary",{"type":48,"tag":92,"props":380,"children":381},{},[382,387,392],{"type":48,"tag":96,"props":383,"children":384},{},[385],{"type":54,"value":386},"Treat an assessment or review as read-only.",{"type":48,"tag":96,"props":388,"children":389},{},[390],{"type":54,"value":391},"Treat a request to enable, prepare, update, or fix TMA as permission to edit only the selected kernel and in-scope launch configuration.",{"type":48,"tag":96,"props":393,"children":394},{},[395],{"type":54,"value":396},"Inspect the selected kernel's device call graph for device-side point-to-point put, get, put-with-signal, and their typed\u002Fthread\u002Fwarp\u002Fblock variants.",{"type":48,"tag":373,"props":398,"children":400},{"id":399},"_2-decide-whether-tma-is-useful-and-available",[401],{"type":54,"value":402},"2. Decide Whether TMA Is Useful and Available",{"type":48,"tag":64,"props":404,"children":405},{},[406],{"type":54,"value":407},"State these conclusions before or alongside a patch:",{"type":48,"tag":92,"props":409,"children":410},{},[411,416,430,435],{"type":48,"tag":96,"props":412,"children":413},{},[414],{"type":54,"value":415},"Require NVSHMEM 3.7.0 or newer. Stop a requested conversion for an older confirmed version and recommend upgrading.",{"type":48,"tag":96,"props":417,"children":418},{},[419,421,428],{"type":54,"value":420},"Require SM90 or newer for TMA execution. With ",{"type":48,"tag":422,"props":423,"children":425},"code",{"className":424},[],[426],{"type":54,"value":427},"NVSHMEM_TMA_POLICY=ENABLE",{"type":54,"value":429},", older GPUs preserve correctness through the regular path but receive no TMA benefit.",{"type":48,"tag":96,"props":431,"children":432},{},[433],{"type":54,"value":434},"TMA helps only peer-reachable GPU memory paths through the GPU load\u002Fstore fabric, normally NVLink. Do not recommend it for IB, RoCE, EFA, or another network transport.",{"type":48,"tag":96,"props":436,"children":437},{},[438],{"type":54,"value":439},"It is promising for large point-to-point transfers, low communication-thread counts, fused kernels, or tiles already in shared memory. Never promise a speedup without measurement.",{"type":48,"tag":64,"props":441,"children":442},{},[443],{"type":54,"value":444},"When version, architecture, or topology is unknown, prepare code only if requested and label the corresponding conclusion unverified.",{"type":48,"tag":373,"props":446,"children":448},{"id":447},"_3-classify-each-operation",[449],{"type":54,"value":450},"3. Classify Each Operation",{"type":48,"tag":64,"props":452,"children":453},{},[454],{"type":54,"value":455},"Inspect local operand spaces, application shared memory, staging-copy dataflow, dynamic\u002Fstatic shared memory, alignment, early returns, CTA-uniform control flow, existing fences\u002Fflushes\u002Fquiet calls, and possible concurrent staged callers in a CTA.",{"type":48,"tag":136,"props":457,"children":458},{},[459,474],{"type":48,"tag":140,"props":460,"children":461},{},[462],{"type":48,"tag":144,"props":463,"children":464},{},[465,469],{"type":48,"tag":148,"props":466,"children":467},{},[468],{"type":54,"value":152},{"type":48,"tag":148,"props":470,"children":471},{},[472],{"type":54,"value":473},"Path",{"type":48,"tag":159,"props":475,"children":476},{},[477,490,503],{"type":48,"tag":144,"props":478,"children":479},{},[480,485],{"type":48,"tag":166,"props":481,"children":482},{},[483],{"type":54,"value":484},"Global-memory application operands, or no proven-redundant staging",{"type":48,"tag":166,"props":486,"children":487},{},[488],{"type":54,"value":489},"NVSHMEM-managed GMEM staging",{"type":48,"tag":144,"props":491,"children":492},{},[493,498],{"type":48,"tag":166,"props":494,"children":495},{},[496],{"type":54,"value":497},"Shared-memory put source with a proven-redundant SMEM-to-GMEM copy",{"type":48,"tag":166,"props":499,"children":500},{},[501],{"type":54,"value":502},"Offer direct shared-memory put as an explicit opt-in",{"type":48,"tag":144,"props":504,"children":505},{},[506,511],{"type":48,"tag":166,"props":507,"children":508},{},[509],{"type":54,"value":510},"Shared-memory get destination",{"type":48,"tag":166,"props":512,"children":513},{},[514],{"type":54,"value":515},"Keep the documented staging path",{"type":48,"tag":64,"props":517,"children":518},{},[519],{"type":54,"value":520},"Default to NVSHMEM-managed staging. Never introduce a new application shared-memory layout solely to force a direct-operand path.",{"type":48,"tag":373,"props":522,"children":524},{"id":523},"_4-apply-the-selected-references",[525],{"type":54,"value":526},"4. Apply the Selected References",{"type":48,"tag":64,"props":528,"children":529},{},[530],{"type":54,"value":531},"Follow the complete registration\u002Flifetime protocol in the shared registration reference. Then apply the selected path reference. Preserve existing completion semantics and do not hard-code the current recommended shared-memory byte count.",{"type":48,"tag":373,"props":533,"children":535},{"id":534},"_5-validate-and-report",[536],{"type":54,"value":537},"5. Validate and Report",{"type":48,"tag":64,"props":539,"children":540},{},[541],{"type":54,"value":542},"Read the validation reference for all compile, run, diagnosis, and validation-report work. Lead the final report with one of:",{"type":48,"tag":92,"props":544,"children":545},{},[546,555,564],{"type":48,"tag":96,"props":547,"children":548},{},[549],{"type":48,"tag":422,"props":550,"children":552},{"className":551},[],[553],{"type":54,"value":554},"TMA is useful and the application is prepared",{"type":48,"tag":96,"props":556,"children":557},{},[558],{"type":48,"tag":422,"props":559,"children":561},{"className":560},[],[562],{"type":54,"value":563},"The application is prepared, but TMA benefit is unverified",{"type":48,"tag":96,"props":565,"children":566},{},[567],{"type":48,"tag":422,"props":568,"children":570},{"className":569},[],[571],{"type":54,"value":572},"TMA is not useful or not supported for this target",{"type":48,"tag":64,"props":574,"children":575},{},[576],{"type":54,"value":577},"Use this report template:",{"type":48,"tag":579,"props":580,"children":585},"pre",{"className":581,"code":583,"language":54,"meta":584},[582],"language-text","Outcome: \u003Cone required outcome line above>\nChanged scope: \u003Cthe selected file, kernel, and launch site; confirm no adjacent files changed>\nSelected path: \u003CNVSHMEM-managed GMEM staging | explicitly opted-in direct-SMEM put>\nPolicy precondition: Set NVSHMEM_TMA_POLICY=ENABLE before nvshmem_init*; \u003Cwhere to set it>\nEligibility: NVSHMEM \u003Cversion, must be >= 3.7.0>; \u003CSM90+ evidence>; \u003CNVLink\u002Fpeer load-store evidence>\nOperation constraints: \u003Calignment, byte count, scope\u002Fconcurrency, completion, shared-memory sizing>\nFallback: ENABLE preserves the regular path for ineligible operations; registration alone does not guarantee TMA routing\nUnverified: \u003Ctopology, occupancy, or none>\nValidation: \u003Cchecks run and exact remaining test commands>\n","",[586],{"type":48,"tag":422,"props":587,"children":588},{"__ignoreMap":584},[589],{"type":54,"value":583},{"type":48,"tag":64,"props":591,"children":592},{},[593],{"type":54,"value":594},"Mention any direct-SMEM candidate deliberately not applied because it was outside scope or its redundancy was not proven.",{"type":48,"tag":57,"props":596,"children":598},{"id":597},"limitations",[599],{"type":54,"value":600},"Limitations",{"type":48,"tag":92,"props":602,"children":603},{},[604,609],{"type":48,"tag":96,"props":605,"children":606},{},[607],{"type":54,"value":608},"Do not convert host-side RMA, collectives without an applicable TMA path, network-transport operations, or remote shared-memory targets.",{"type":48,"tag":96,"props":610,"children":611},{},[612],{"type":54,"value":613},"Do not claim registration guarantees TMA routing; policy, architecture, topology, operand space, alignment, size, scope, and runtime limits determine each transfer.",{"type":48,"tag":57,"props":615,"children":617},{"id":616},"troubleshooting",[618],{"type":54,"value":619},"Troubleshooting",{"type":48,"tag":64,"props":621,"children":622},{},[623,625,629,631,636],{"type":54,"value":624},"For configuration failures, incorrect results, hangs near shared-memory release, or an unselected TMA path, read ",{"type":48,"tag":75,"props":626,"children":627},{"href":210},[628],{"type":54,"value":213},{"type":54,"value":630},". Treat regular-path fallback under ",{"type":48,"tag":422,"props":632,"children":634},{"className":633},[],[635],{"type":54,"value":427},{"type":54,"value":637}," as valid behavior; do not diagnose it as a correctness failure.",{"type":48,"tag":57,"props":639,"children":641},{"id":640},"examples",[642],{"type":54,"value":643},"Examples",{"type":48,"tag":579,"props":645,"children":648},{"className":646,"code":647,"language":54,"meta":584},[582],"Use $nvshmem-enable-tma to prepare app.cu for NVSHMEM TMA on H100 NVLink while leaving non-NVSHMEM kernels unchanged.\n\nUse $nvshmem-enable-tma to inspect a shared-tile-to-GMEM-to-put sequence and, if the GMEM copy is provably redundant, pass the existing shared tile directly.\n\nUse $nvshmem-enable-tma to assess an NVSHMEM 3.6 application running on A100 peers connected only through InfiniBand.\n",[649],{"type":48,"tag":422,"props":650,"children":651},{"__ignoreMap":584},[652],{"type":54,"value":647},{"items":654,"total":812},[655,673,690,701,713,727,740,754,767,778,792,801],{"slug":656,"name":656,"fn":657,"description":658,"org":659,"tags":660,"stars":670,"repoUrl":671,"updatedAt":672},"nemoclaw-user-guide","retrieve NemoClaw documentation and configuration","Guides human users' AI agents to the NemoClaw docs MCP server and canonical Fern documentation in Markdown form. Use when users ask how to install, configure, operate, troubleshoot, secure, or learn NemoClaw with an AI coding assistant. Trigger keywords - nemoclaw docs, use nemoclaw with ai agent, nemoclaw mcp docs, nemoclaw install help, nemoclaw quickstart, nemoclaw markdown docs, llms.txt, agent skills.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[661,664,667],{"name":662,"slug":663,"type":15},"Documentation","documentation",{"name":665,"slug":666,"type":15},"MCP","mcp",{"name":668,"slug":669,"type":15},"Search","search",21777,"https:\u002F\u002Fgithub.com\u002FNVIDIA\u002FNemoClaw","2026-08-25T03:29:57.273192",{"slug":674,"name":674,"fn":675,"description":676,"org":677,"tags":678,"stars":687,"repoUrl":688,"updatedAt":689},"mcore-build-and-dependency","manage Megatron-LM development environments","Container-based dev environment setup and dependency management for Megatron-LM. Covers acquiring and launching the CI container, uv package management, and updating uv.lock.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[679,682,685],{"name":680,"slug":681,"type":15},"Containers","containers",{"name":683,"slug":684,"type":15},"Deployment","deployment",{"name":686,"slug":30,"type":15},"Python",17049,"https:\u002F\u002Fgithub.com\u002FNVIDIA\u002FMegatron-LM","2026-07-27T06:06:11.249662",{"slug":691,"name":691,"fn":692,"description":693,"org":694,"tags":695,"stars":687,"repoUrl":688,"updatedAt":700},"mcore-bump-base-image","update NVIDIA PyTorch base images","Bump the NVIDIA PyTorch base image (`nvcr.io\u002Fnvidia\u002Fpytorch:YY.MM-py3`) used by Megatron-LM CI. Covers the two pin sites (GitHub CI in `docker\u002F.ngc_version.dev` and GitLab CI in `.gitlab\u002Fstages\u002F01.build.yml`), the post-bump CI loop (re-run functional tests, refresh golden values, mark broken tests), and the gotchas that bit PRs",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[696,699],{"name":697,"slug":698,"type":15},"CI\u002FCD","ci-cd",{"name":683,"slug":684,"type":15},"2026-07-14T05:25:59.97109",{"slug":702,"name":702,"fn":703,"description":704,"org":705,"tags":706,"stars":687,"repoUrl":688,"updatedAt":712},"mcore-cicd","manage CI\u002FCD pipelines for Megatron-LM","CI\u002FCD reference for Megatron-LM. Covers CI pipeline structure, PR scope labels, triggering internal GitLab CI (which force-pushes the current branch to a pull-request\u002FBRANCH ref — always dry-run and verify the destination first; never run against shared or protected branches), and CI failure investigation.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[707,708,709],{"name":697,"slug":698,"type":15},{"name":683,"slug":684,"type":15},{"name":710,"slug":711,"type":15},"GitHub","github","2026-08-28T14:38:16.959248",{"slug":714,"name":714,"fn":715,"description":716,"org":717,"tags":718,"stars":687,"repoUrl":688,"updatedAt":726},"mcore-create-issue","investigate CI failures and create issues","Investigate a failing GitHub Actions run or job and create a GitHub issue for the failure.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[719,722,723],{"name":720,"slug":721,"type":15},"Debugging","debugging",{"name":710,"slug":711,"type":15},{"name":724,"slug":725,"type":15},"Triage","triage","2026-07-14T05:25:57.442089",{"slug":728,"name":728,"fn":729,"description":730,"org":731,"tags":732,"stars":687,"repoUrl":688,"updatedAt":739},"mcore-linting-and-formatting","lint and format Megatron-LM code","Linting and formatting for Megatron-LM. Covers running autoformat.sh, tools (ruff, black, isort, pylint, mypy), and code style rules.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[733,736],{"name":734,"slug":735,"type":15},"Best Practices","best-practices",{"name":737,"slug":738,"type":15},"Code Analysis","code-analysis","2026-07-14T05:25:56.18433",{"slug":741,"name":741,"fn":742,"description":743,"org":744,"tags":745,"stars":687,"repoUrl":688,"updatedAt":753},"mcore-migrate-gpt-to-hybrid","migrate Megatron-LM models to HybridModel","Migration guide for moving Megatron Core GPTModel checkpoints, model providers, training commands, and layer mappings to HybridModel, including the mechanical steps for transferring an existing pretrain_gpt.py launch script.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[746,749,752],{"name":747,"slug":748,"type":15},"Machine Learning","machine-learning",{"name":750,"slug":751,"type":15},"Migration","migration",{"name":9,"slug":8,"type":15},"2026-08-21T03:36:57.470256",{"slug":755,"name":755,"fn":756,"description":757,"org":758,"tags":759,"stars":687,"repoUrl":688,"updatedAt":766},"mcore-onboard-gb200-1node-tests","onboard functional tests for GB200","Onboard 1-node GitHub MR functional tests for GB200 from existing mr-scoped 2-node tests.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[760,763],{"name":761,"slug":762,"type":15},"QA","qa",{"name":764,"slug":765,"type":15},"Testing","testing","2026-07-14T05:25:53.673039",{"slug":768,"name":768,"fn":769,"description":770,"org":771,"tags":772,"stars":687,"repoUrl":688,"updatedAt":777},"mcore-run-on-slurm","launch distributed training jobs on SLURM","How to launch distributed Megatron-LM training jobs on a SLURM cluster. Covers a minimal sbatch skeleton, environment-variable setup for torch.distributed.run, CUDA_DEVICE_MAX_CONNECTIONS rules across hardware and parallelism modes, container conventions, monitoring, and per-rank failure diagnosis.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[773,774],{"name":683,"slug":684,"type":15},{"name":775,"slug":776,"type":15},"Infrastructure","infrastructure","2026-07-14T05:25:49.362534",{"slug":779,"name":779,"fn":780,"description":781,"org":782,"tags":783,"stars":687,"repoUrl":688,"updatedAt":791},"mcore-split-pr","split pull requests to reduce review load","Split a PR into multiple PRs to reduce the number of required CODEOWNERS reviewer groups.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[784,787,788],{"name":785,"slug":786,"type":15},"Code Review","code-review",{"name":710,"slug":711,"type":15},{"name":789,"slug":790,"type":15},"Pull Requests","pull-requests","2026-08-25T03:29:16.211287",{"slug":793,"name":793,"fn":794,"description":795,"org":796,"tags":797,"stars":687,"repoUrl":688,"updatedAt":800},"mcore-testing","run and manage Megatron-LM tests","Test system for Megatron-LM. Covers test layout, recipe YAML structure, adding and running unit and functional tests, golden values, marker filters, and CI parity.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[798,799],{"name":761,"slug":762,"type":15},{"name":764,"slug":765,"type":15},"2026-07-14T05:25:54.928983",{"slug":802,"name":802,"fn":803,"description":804,"org":805,"tags":806,"stars":687,"repoUrl":688,"updatedAt":811},"nightly-sync","manage nightly main-to-dev sync workflows","Domain knowledge for the nightly main-to-dev sync workflow. Covers merge strategy, CI architecture, failure investigation, and known issues.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[807,810],{"name":808,"slug":809,"type":15},"Automation","automation",{"name":697,"slug":698,"type":15},"2026-07-30T05:29:03.275638",563,{"items":814,"total":891},[815,827,841,853,859,871,881],{"slug":816,"name":816,"fn":817,"description":818,"org":819,"tags":820,"stars":20,"repoUrl":21,"updatedAt":826},"nvshmem-collect-performance-data","collect NVSHMEM performance metrics","Collect and package NVSHMEM put\u002Fget bandwidth, latency, and other perftest results with system and topology evidence for performance sanity checks.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[821,824,825],{"name":822,"slug":823,"type":15},"Monitoring","monitoring",{"name":9,"slug":8,"type":15},{"name":13,"slug":14,"type":15},"2026-08-31T09:19:00.917887",{"slug":828,"name":828,"fn":829,"description":830,"org":831,"tags":832,"stars":20,"repoUrl":21,"updatedAt":840},"nvshmem-configure-nic-pe-mapping","configure NVSHMEM NIC-to-PE mappings","Recommend NVSHMEM NIC-to-PE mappings and environment exports. Use for HCA selection, multi-NIC configuration, or topology-based mapping diagnostics.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[833,836,839],{"name":834,"slug":835,"type":15},"Configuration","configuration",{"name":837,"slug":838,"type":15},"Networking","networking",{"name":9,"slug":8,"type":15},"2026-08-31T09:19:06.10294",{"slug":842,"name":842,"fn":843,"description":844,"org":845,"tags":846,"stars":20,"repoUrl":21,"updatedAt":852},"nvshmem-docs","fetch official NVSHMEM documentation","Find version-aware official NVSHMEM and NVSHMEM4Py documentation for releases, installation, APIs, runtime settings, transports, containers, and troubleshooting.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[847,848,849],{"name":662,"slug":663,"type":15},{"name":9,"slug":8,"type":15},{"name":850,"slug":851,"type":15},"Reference","reference","2026-08-31T09:19:00.214841",{"slug":4,"name":4,"fn":5,"description":6,"org":854,"tags":855,"stars":20,"repoUrl":21,"updatedAt":22},{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[856,857,858],{"name":18,"slug":19,"type":15},{"name":9,"slug":8,"type":15},{"name":13,"slug":14,"type":15},{"slug":860,"name":860,"fn":861,"description":862,"org":863,"tags":864,"stars":20,"repoUrl":21,"updatedAt":870},"nvshmem-get-started","onboard developers to NVSHMEM","Guide NVSHMEM beginners through fit assessment, mental models, first C\u002FC++ or Python NVSHMEM programs, compilation, launching, and next steps. Use for onboarding.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[865,866,867],{"name":662,"slug":663,"type":15},{"name":9,"slug":8,"type":15},{"name":868,"slug":869,"type":15},"Onboarding","onboarding","2026-08-31T09:18:55.48573",{"slug":872,"name":872,"fn":873,"description":874,"org":875,"tags":876,"stars":20,"repoUrl":21,"updatedAt":880},"nvshmem-install","install and validate NVSHMEM","Plan and validate NVSHMEM and NVSHMEM4Py installations. Use for package, container, or source deployments.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[877,878,879],{"name":683,"slug":684,"type":15},{"name":18,"slug":19,"type":15},{"name":9,"slug":8,"type":15},"2026-08-31T09:18:50.105521",{"slug":882,"name":882,"fn":883,"description":884,"org":885,"tags":886,"stars":20,"repoUrl":21,"updatedAt":890},"nvshmem-select-remote-transport","select NVSHMEM remote transport configurations","Select an NVSHMEM remote transport from target system and kernel evidence. Use for inter-node selection, compatibility checks, or configuration.",{"slug":8,"name":9,"logoUrl":10,"githubOrg":9},[887,888,889],{"name":834,"slug":835,"type":15},{"name":9,"slug":8,"type":15},{"name":13,"slug":14,"type":15},"2026-08-31T09:18:59.493722",9]